Program Manager or Software Engineer Position Wanted!

One of Zheda Alumni is looking for a job around Bayarea. If you know any such opportunities, please let us know (zheda.alumni@gmail.com). Your help is highly appreicated:

Objective: A program manager/software engineer position that can utilize and challenge my experience of project management, working with outsourcing partners, and software/firmware development.

8/2002 to 9/2009: Program Manager/Firmware Development Engineer, Hewlett-Packard, Cupertino, CA

• Working on HP ProLiant PL-100 series server systems, managing BIOS and IPMI software development schedules, and discovering software issues/innovations.

• Studying industry standard specifications, reviewing new technologies provided by companies such as Intel, Microsoft and AMD, and updating HP server software specification based on industry requirement.

• Working with outsourced partners to help them understand HP requirements, solve program and functionality issues/problems, review software and system test plans, evaluate test results, and debug BIOS and OS related issues.

• Helping HP customer-support team for any system related issues, provide first level technique services to solve customer problems/concerns such as fan speed control, power management, and memory ECC errors; and debug customer issues/troubles at HP labs and at customer sites. 

Projects completed: TC2100, TC2120, DL140G2, DL145G2, DL140G3, DL145G3, DL160G5, DL165G5, DL180G5, DL185G5, DL160G6, and DL180G6.

2/2000 to 8/2002: Firmware Development Engineer, Hewlett-Packard, Cupertino, CA

• Developed BIOS firmware for HP Net-Servers.

HP Net-Server LC2000 and LH3000.

5/96 to 2/2000: Firmware Development Engineer, Phoenix Technologies Ltd, San Jose, CA

• Implemented new BIOS features in Phoenix core BIOS, such as power management, ACPI, USB.

• Developed BIOS to support chipset from Cyrix, AMD and Intel.

• Provided customer service to notebook manufactures such as Sony and Toshiba.

1/91 to 5/96: Research Assistant, Diagnostic Instrumentation & Analysis laboratory, MSU

• Designed and implemented 48-tap FIR low-pass filter in a Xilinx FPGA by using VHDL and Viewlogic.

• Completed behavioral architecture description for a Cypress FIFO memory by using Quick VHDL simulator.

• Designed and implemented adaptive filters and low pass filters to process the noise corrupted signals using C and Matlab.

• Java, C/C++, and assembly languages.

• Legacy power management, PCI, USB, ACPI, and Phoenix BIOS.

Debug Tools (computer board level design and debug using):

• American Arium ROM emulator.

• Oscilloscopes and logic analyzer.

MS Physics, Mississippi State University                         8/1994.